OCASA 2005 Workshop
Tuesday, September 27, 2005, 1:00-6:30pm
Sir Francis Drake Hotel, San Francisco, CA
Welcome and Introduction: (1:00pm - 1:05pm)
Scott Mahlke, University of Michigan
Vincent Mooney, Georgia Institute of Technology
Session 1: Configurable Computing (1:05pm - 2:45pm)
- "Structures for Robustly Moving Optimized Compiler Output to Silicon"
Wayne Nation, LSI Logic [PDF]
- "Compile-time Design Space Exploration for Dynamically Reconfigurable
Weng-fai Wong, National University of Singapore [PDF]
- "Customizable Processors: Lofty Ambitions, Start Realities"
Paolo Faraboschi, Hewlett Packard [PDF]
- "Productive and Efficient FPGA Compilation"
Wayne Luk and Oskar Mencer, Imperial College [PDF]
Session 2: SoC Design (3:00pm - 4:45pm)
- "Technology and Complexity challenges in SoC design: What Else Compilers
Marco Cornero, ST Microelectronics [PDF]
- "Leveraging Parallelizing Compiler Technology for System-on-a-Chip
Mary Hall, University of Southern California, ISI [PDF]
- "Automation and MPSoC: A Perspective"
Grant Martin, Tensilica [PDF]
- "Compiler-in-the-Loop Exploration of Programmable SOCs"
Aviral Shrivastava, University of California, Irvine [PDF]
- "Customization In Embedded Systems"
Krishna Palem, Georgia Institute of Technology [PDF]
Session 3: Memory Systems (5:00pm - 6:25pm)
- "Synthesizing Memory Structures: Where the Analysis Meets the Reality"
Shail Aditya, Synfora [PDF]
- "Compiler Optimizations Improving the Processor/Memory Interface"
Peter Marwedel, University of Dortmund [PDF]
- "Beat the Desktop Mindset!"
Rajeev Barua, University of Maryland [PDF]