Home                                                                                                                                                                       Call    Program  Venue   Other                                                                                                                                                                 

Cases 2000:

First International Conference on Compilers, Architecture, and Synthesis for Embedded Systems

November 17-18, 2000

Doubletree Hotel

San Jose, California


The purpose of this working conference, the third in the series, is to provide a forum for discussing emerging technology themes in embedded computing system design. Over the past decade, substantial research has gone into the design of general-purpose microprocessors embodying parallelism at the instruction-level, as well as aggressive compiler optimization and analysis techniques for harnessing this parallelism. Growing demand for high performance in embedded systems is creating new opportunities to leverage technologies such as instruction-level parallelism (ILP) or Explicitly Parallel Instruction Computing (EPIC). Examples of application areas with the need for high performance and application specific embedded computing include set-top boxes, hand-held games, mobile and web appliances, and advanced automotive systems. However, several novel challenges have to be overcome in order to harness the opportunities offered by emerging technologies in the context of embedded systems. Constraints on cost, code size, weight, power consumption and real-time requirements place stringent requirements on processors and the software they execute. In addition, design time is an important issue because of the growing demand for rapid time-to-market.